With the continuous development of the semiconductor production technology and the three-dimensional packaging technology, increasingly high requirements are imposed on multi-function and miniaturization of electronic devices and electronic products. Under the promotion of the trend of miniaturization, it is required to continuously reduce a packaging size of a chip. According to the International Technology Roadmap for Semiconductors, the miniaturization of a package can be better achieved with a three-dimensional package-on-package (POP) technology.
The three-dimensional package-on-package technology has the following features: a small packaging volume, a large packaging space, a fast signal transmission speed due to a shortened wire, a short product development cycle, a high launch speed and the like. The three-dimensional package-on-package technology is mainly used to handheld devices and digital products such as mobile phones, laptops and digital cameras.
At present, the three-dimensional package-on-package technology is already applied to the field of image sensing chip packaging. A package-on-package structure of a conventional image sensing chip is as shown in FIG. 1. In the package-on-package structure, an image sensing chip package 10 is connected to a surface of a control chip package 20, a flexible printed circuit (FPC) 30 is connected to an opposite surface of the control chip package 20, such that the image sensing chip package 10, the flexible printed circuit (FPC) 30 and the control chip package 20 form a stacking structure.
In the package-on-package structure of the image sensing chip shown in FIG. 1, the flexible printed circuit (FPC) 30 and the image sensing chip package 10 are respectively arranged on two opposite surfaces of the control chip package 20, to form a vertical stacking structure. A total thickness of the vertical stacking structure may be affected by a thickness of each of the flexible printed circuit (FPC) 30, the control chip package 20 and the image sensing chip package 10, resulting in that the package-on-package structure of the image sensing chip has a relative great thickness, which is adverse to the production of a thin and light electronic product.